In this post we’ll talk about an interesting micro-controller by Infineon called XMC4800, we spent some months developing an EtherCAT slave on this chip and here is our impression. The micro-controller is based on a ARM Cortex-M4 core equipped with 2048k of Flash and 340k of RAM. Peripherals included are 4+2 PWM Timers, 6 serial channels Quad SPI, UART, I2C, I2S, 6 CANbus channels, a maximum clock frequency of 144 MHz, 4 x 12-bit ADC, 1 Watchdog Timer, 1 RTC, a CRC engine, a SDIO/SD/MMC interface, 10/100 Ethernet MAC, 1 USB-OTG, and a External Memory Interface, other than the EtherCAT controller. The price is about 17e (for 100pz), for simple controllers with no complex processing required maybe a solution with a cheap Cortex-M0 and the Microchip LAN9252 EtherCAT controller is less epxensive. Instead for projects with a IEC 61508 Functional Safety level requirement up-to SIL3, the manufacturer has a F.S. support package and so the price becomes cheap. We didn’t have the chance te evaluate the Functional Safety Package since our project had no SIL requirements. The integration in a single chip of the field-bus controller and the micro-controller may also simplify the certification process, since the field-bus channel can be secured with a black-channel approach and the development of the Fail Safe Over EtherCAT layer without redundancy.
The XMC4800 is targeted for medium-complexity slave controllers, requiring large memory space and/or data processing, personally i found the Flash size too big and the Ram size too limited, industrial applications usually have increasing RAM requirements rather than increasing processing code size, anyway it depends on the specific project.
The reccomended IDE for a not-SIL project is DAVE, the eclipse-based ide developed by the manufacturer. The tool includes a graphical components manager with a code generator, for the definition, the allocation and the configuration of pins and peripherals in a visual way. The EtherCAT stack is free for registered EtherCAT developer and the chip is supported by the stack code generator SSC. This tool is limited, so we had to manually write or modify the generated ethercat stack code for some functionalities and the controller definition. A good knowledge of the EtherCAT fieldbus is required. Also a good knowledge of an EtherCAT master for example TwinCAT is required for debbuging and testing.
The debugger is fast and responsive, the chip is supported by SEGGER J-Link devices, we had only occasional bugs requiring the relaunch of the software in order to unlock the J-Link. HAL libraries are a little bit lacking and i advise to use them with the code generator.
In conclusion it is a very interesting product, reducing the development time and the time-to-market with a special advantage for Functional Safety projects.